Digital Transmission Design and Jitter Analysis
Digital Transmission Design and Jitter Analysis
Jitter in Digital Transmission System
Jitter in Digital Transmission System
A method of serial data jitter analysis using one-shot time interval measurements
ITC '98 Proceedings of the 1998 IEEE International Test Conference
A High-Resolution Jitter Measurement Technique Using ADC Sampling
ITC '01 Proceedings of the 2001 IEEE International Test Conference
An Approach to Consistent Jitter Modeling for Various Jitter Aspects and Measurement Methods
ITC '01 Proceedings of the 2001 IEEE International Test Conference
Random Jitter Extraction Technique in a Multi-Gigahertz Signal
Proceedings of the conference on Design, automation and test in Europe - Volume 1
A Scalable On-Chip Jitter Extraction Technique
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
Jitter spectral extraction for multi-gigahertz signal
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
"Signal integrity analysis in the open architecture"
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Jitter decomposition in ring oscillators
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Jitter Decomposition by Time Lag Correlation
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
A statistical study of the effectiveness of BIST jitter measurement techniques
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
System-on-Chip Test Architectures: Nanometer Design for Testability
System-on-Chip Test Architectures: Nanometer Design for Testability
A Better Method than Tail-fitting Algorithm for Jitter Separation Based on Gaussian Mixture Model
Journal of Electronic Testing: Theory and Applications
Periodic jitter and bounded uncorrelated jitter decomposition using incoherent undersampling
Proceedings of the Conference on Design, Automation and Test in Europe
Design specification for BER analysis methods using built-in jitter measurements
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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We present a new time-domain jitter separation method.Such a method automatically searches and fits the tail partsof the jitter histogram with nonlinear jitter models andestimates deterministic and random jitter components. Biterror rate (BER) calculation based on the deterministic andrandom jitter components is also discussed anddemonstrated.