IDDQ Test: Sensitivity Analysis of Scaling
Proceedings of the IEEE International Test Conference on Test and Design Validity
Process-Aggravated Noise (PAN): New Validation and Test Problems
Proceedings of the IEEE International Test Conference on Test and Design Validity
Current Signatures: Application
Proceedings of the IEEE International Test Conference
Diagnosis and characterization of timing-related defects by time-dependent light emission
ITC '98 Proceedings of the 1998 IEEE International Test Conference
The Effectiveness of IDDQ, Functional and Scan Tests: How Many Fault Coverages Do We Need?
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Correlations between path delays and the accuracy of performance prediction
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Is IDDQ Yield Loss Inevitable?
Proceedings of the IEEE International Test Conference on TEST: The Next 25 Years
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Accuracy Requirements in At-Speed Functional Test
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Accuracy Requirements in At-Speed Functional Test
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Test Data Compression: The System Integrator's Perspective
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
| Hi-index | 0.00 |
Structural test can address only stuck-at faults unless some dynamic capability is included. The dynamic capability required starts with two-vectorlaunch-capture delay tests, but evolves rapidly toinclude gated clock bursts, perhaps synchronizedwith primary I/O's. This implies an at-speed structural test architecture which incorporates many ofthe capabilities of functional test systems.