Residue number system arithmetic: modern applications in digital signal processing
Residue number system arithmetic: modern applications in digital signal processing
A New Approach to Fixed-Coefficient Inner Product Computation Over Finite Rings
IEEE Transactions on Computers
Fast Converter for 3 Moduli RNS Using New Property of CRT
IEEE Transactions on Computers
New Efficient Structure for a Modular Multiplier for RNS
IEEE Transactions on Computers
High-Speed and Reduced-Area Modular Adder Structures for RNS
IEEE Transactions on Computers
Computer Arithmetic: Principles, Architecture and Design
Computer Arithmetic: Principles, Architecture and Design
Introduction to Arithmetic for Digital Systems Designers
Introduction to Arithmetic for Digital Systems Designers
Fast Combinatorial RNS Processors for DSP Applications
IEEE Transactions on Computers
A Reverse Converter for the 4-moduli Superset {2^n-1, 2^n, 2^n+1, 2^(n+1)+1}
ARITH '99 Proceedings of the 14th IEEE Symposium on Computer Arithmetic
An Efficient Residue to Weighted Converter for a New Residue Number System
GLS '98 Proceedings of the Great Lakes Symposium on VLSI '98
Adaptive redundant residue number system coded multicarrier modulation
IEEE Journal on Selected Areas in Communications
Information Sciences: an International Journal
A novel architecture for conversion of binary to single digit double base numbers
ACM SIGARCH Computer Architecture News
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Residue representation is a non-weighted number system that is very efficient in digital signal processing and communication applications. In this paper, we present a new 5-moduli set, that expands the dynamic range in comparison with the popular 3-moduli sets. The moduli set is defined as (22n-4, 22n-1 - 1, 22n-1 + 1, 22n-1 - 2n + 1, 22n-1 + 2n + 1), where n is a positive integer. This paper expresses the multiplicative inverse of each modulus in a compact form that eases the conversion. A total of six carry-save with end-around-carry adders and a modular adder are the only components needed to build the proposed converter. Based on 0.5 µm CMOS technology, the area and delay requirements of VLSI layouts of the new converter are much less than other similar converters.