A New Approach to the Design of Testable PLA's
IEEE Transactions on Computers
A method for generating weighted random test pattern
IBM Journal of Research and Development
PLATYPUS: a PLA test pattern generation tool
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
PROTEST: a tool for probabilistic testability analysis
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
A unified treatment of PLA faults by Boolean differences
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
Simulation results of an efficient defect analysis procedure
ITC'94 Proceedings of the 1994 international conference on Test
| Hi-index | 0.00 |
It has been theoretically demonstrated that the single stuck-at fault model for a PLA does not cover as many faults as the single crosspoint model. What has not been demonstrated is the real relative effectiveness of test sets generated using these models. This paper presents the results of a study involving presenting a number of test sets to fabricated PLAs to determine their effectiveness. The test sets included weighted random patterns, of particular interest owing to PLAs being random resistant. Details are given of a method to generate weights, taking into account a PLA's structure.