Distributed snapshots: determining global states of distributed systems
ACM Transactions on Computer Systems (TOCS)
CORDS: hardware-software co-synthesis of reconfigurable real-time distributed embedded systems
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Energy efficient fixed-priority scheduling for real-time systems on variable voltage processors
Proceedings of the 38th annual Design Automation Conference
A survey of rollback-recovery protocols in message-passing systems
ACM Computing Surveys (CSUR)
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Computers and Intractability: A Guide to the Theory of NP-Completeness
A Checkpointing Tool for Palm Operating System
DSN '01 Proceedings of the 2001 International Conference on Dependable Systems and Networks (formerly: FTCS)
Communication speed selection for embedded systems with networked voltage-scalable processors
Proceedings of the tenth international symposium on Hardware/software codesign
Adapative Error Protection for Energy Efficiency
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Fault-Tolerant Techniques for Ambient Intelligent Distributed Systems
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Energy-Aware Adaptive Checkpointing in Embedded Real-Time Systems
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Symbolic reliability analysis and optimization of ECU networks
Proceedings of the conference on Design, automation and test in Europe
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CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
Proceedings of the 2009 ACM symposium on Applied Computing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Proceedings of the 2009 International Conference on Computer-Aided Design
Journal of Electronic Testing: Theory and Applications
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We investigate a unified approach for fault tolerance and dynamic power management in distributed real-time embedded systems. Coordinated checkpointing is used to achieve fault tolerance, and power management is carried out using dynamic voltage scaling. We present feasibility-of-scheduling tests for coordinated checkpointing schemes for a constant processor speed as well as for DVS-enabled processors that can operate at variable speeds. Simulation results based on the CORDS hardware/software co-synthesis system show that, compared to fault-oblivious methods, the proposed approach significantly reduces power consumption while guaranteeing timely task completion in the presence of faults.