Reliable computer systems (2nd ed.): design and evaluation
Reliable computer systems (2nd ed.): design and evaluation
NanoFabrics: spatial computing using molecular electronics
ISCA '01 Proceedings of the 28th annual international symposium on Computer architecture
Coding approaches to fault tolerance in combinational and dynamic systems
Coding approaches to fault tolerance in combinational and dynamic systems
Carbon nanotube field-effect transistors and logic circuits
Proceedings of the 39th annual Design Automation Conference
Accelerator Data-Path Synthesis for High-Throughput Signal Processing Applications
Accelerator Data-Path Synthesis for High-Throughput Signal Processing Applications
Defect tolerance on the Teramac custom computer
FCCM '97 Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines
Highly fault-tolerant parallel computation
FOCS '96 Proceedings of the 37th Annual Symposium on Foundations of Computer Science
Computer
Array-based architecture for FET-based, nanoscale electronics
IEEE Transactions on Nanotechnology
A Reconfiguration-Based Defect-Tolerant Design Paradigm for Nanotechnologies
IEEE Design & Test
RAS-NANO: a reliability-aware synthesis framework for reconfigurable nanofabrics
Proceedings of the conference on Design, automation and test in Europe: Proceedings
On the use of Bloom filters for defect maps in nanocomputing
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Probabilistic system-on-a-chip architectures
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Cost-driven repair optimization of reconfigurable nanowire crossbar systems with clustered defects
Journal of Systems Architecture: the EUROMICRO Journal
A hybrid nano-CMOS architecture for defect and fault tolerance
ACM Journal on Emerging Technologies in Computing Systems (JETC)
History index of correct computation for fault-tolerant nano-computing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Recent successes in the development and self-assembly of nanoelectronic devices suggest that the ability to manufacture dense nanofabrics is on the near horizon. However, the tremendous increase in device density of nanoelectronics will be accompanied by a substantial increase in hard and soft faults, posing a major challenge to current design methodologies and tools. In this paper we propose a novel probabilistic design paradigm for defective but reconfigurable nanofabrics. The new design goal is to devise an appropriate structural/behavioral decomposition which improves scalability by constraining the reconfiguration process, while meeting a desired probability of successful instantiation, i.e, yield. Our approach not only addresses the scalability problem in configuring dense nanofabrics subject to defects, but gives a rich framework in which critical trade-offs among performance, yield, and per chip cost can be explored. We present a concrete instance of the approach and show extensive experimental results supporting these claims.