NanoFabrics: spatial computing using molecular electronics
ISCA '01 Proceedings of the 28th annual international symposium on Computer architecture
Coding approaches to fault tolerance in combinational and dynamic systems
Coding approaches to fault tolerance in combinational and dynamic systems
Defect tolerance on the Teramac custom computer
FCCM '97 Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines
Computer
Defect tolerant probabilistic design paradigm for nanotechnologies
Proceedings of the 41st annual Design Automation Conference
A system architecture solution for unreliable nanoelectronic devices
IEEE Transactions on Nanotechnology
Array-based architecture for FET-based, nanoscale electronics
IEEE Transactions on Nanotechnology
Hybrid CMOS/nanoelectronic digital circuits: devices, architectures, and design automation
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
RAS-NANO: a reliability-aware synthesis framework for reconfigurable nanofabrics
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Improving yield and reliability of chip multiprocessors
Proceedings of the Conference on Design, Automation and Test in Europe
A fault-tolerant interconnect mechanism for NMR nanoarchitectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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To address the density, scalability, and reliability challenges of emerging nanotechnologies, the authors propose a hierarchy of design abstractions, constructed as reconfigurable fabric regions, whereby designers assign small functional flows to each region. The approach exposes a new class of yield, delay, and cost trade-offs that must be jointly considered when designing computing systems in defect-prone nanotechnologies.