Elements of information theory
Elements of information theory
MOS current mode logic for low power, low noise CORDIC computation in mixed-signal environments
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Analysis and Design of Analog Integrated Circuits
Analysis and Design of Analog Integrated Circuits
A performance evaluation of the Intel iAPX 432
ACM SIGARCH Computer Architecture News
Word Voter: A New Voter Design for Triple Modular Redundant Systems
VTS '00 Proceedings of the 18th IEEE VLSI Test Symposium
A Tuturial on the Emerging Nanotechnology Devices
VLSID '04 Proceedings of the 17th International Conference on VLSI Design
Defect and Error Tolerance in the Presence of Massive Numbers of Defects
IEEE Design & Test
Microarchitecture and Design Challenges for Gigascale Integration
Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture
A Reconfiguration-Based Defect-Tolerant Design Paradigm for Nanotechnologies
IEEE Design & Test
Toward Hardware-Redundant, Fault-Tolerant Logic for Nanoelectronics
IEEE Design & Test
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Process variation aware OPC with variational lithography modeling
Proceedings of the 43rd annual Design Automation Conference
Improving Yield and Defect Tolerance in Subthreshold CMOS Through Output-Wired Redundancy
Journal of Electronic Testing: Theory and Applications
Redundancy management technique for space shuttle computers
IBM Journal of Research and Development
Crosstalk-aware channel coding schemes for energy efficient and reliable NOC interconnects
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Single-walled carbon nanotube electronics
IEEE Transactions on Nanotechnology
IEEE Transactions on Nanotechnology
Array-based architecture for FET-based, nanoscale electronics
IEEE Transactions on Nanotechnology
Majority multiplexing-economical redundant fault-tolerant designs for nanoarchitectures
IEEE Transactions on Nanotechnology
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Redundancy techniques, such as N-tuple modular redundancy (NMR), has been widely used to correct faulty behavior of components and achieve high reliability. Almost all redundancy-based strategies rely on a majority voting. The voter, therefore, becomes a critical unit for the correct operation of any NMR system. In this paper, we propose a voterless fault-tolerant strategy to implement a robust NMR system design. We show that using a novel fault-tolerant communication mechanism, namely logic code division multiple access, we can transfer data with extremely low error rates among N modules and completely eliminate the need for a centralized voter unit. Such a highly reliable strategy is vital for future nanosystems in which high defect rate is expected. Experimental results are also reported to verify the concept, clarify the design procedure, and measure the system's reliability.