An iterative technique for printed wire routing
DAC '74 Proceedings of the 11th Design Automation Workshop
Abstract routing of logic networks for custom module generation
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
A new interactive supply/demand router with rip-up capability for printed circuit boards
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
A high performance routing engine
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
DYNAJUST: an efficient automatic routing technique optimizing delay conditions
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Boundary Detection by Constrained Optimization
IEEE Transactions on Pattern Analysis and Machine Intelligence
PathFinder: a negotiation-based performance-driven router for FPGAs
FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays
An investigation of iterative routing algorithms
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Performance driven multi-layer general area routing for PCB/MCM designs
DAC '98 Proceedings of the 35th annual Design Automation Conference
Routability-driven repeater block planning for interconnect-centric floorplanning
ISPD '00 Proceedings of the 2000 international symposium on Physical design
Improved global routing through congestion estimation
Proceedings of the 40th annual Design Automation Conference
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
A route system based on ant colony for coarse-grain reconfigurable architecture
ICNC'06 Proceedings of the Second international conference on Advances in Natural Computation - Volume Part II
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A wire routing system (VIKING) has been developed for interconnection packages. It uses iterative-improvement methods that allow "illegalities" (such as wire crossings within a plane) at intermediate stages of the routing, eliminates some drawbacks of conventional sequential routers, and extends the range of penalty functions with respect to which a wiring configuration can be optimized. Efficient routing in directionally uncommitted planes is provided; specification of preferred-direction (x and y) planes is optional but not required. Significant reductions in required manual embedding effort, number of vias required, routed wire length, and the number of signal planes required to wire a package, have been found, compared with sequential routers that have been used. Improved automatic control of electrical crosstalk noise has also been provided. In addition to presenting VIKING methods and results, we discuss other issues relating to wiring methods and global optimization. Application of these methods to chip design is also discussed.