DEPOGIT: dense power-ground interconnect architecture for physical design integrity

Authors:
Atsushi Kurokawa;Nobuto Ono;Tetsuro Kage;Hiroo Masuda
Affiliations:
Semiconductor Technology Academic Research Center;SII EDA Technologies Inc.;Semiconductor Technology Academic Research Center;Semiconductor Technology Academic Research Center
Venue:
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Year:
2004

Citing 11
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Abstract

In recent deep submicron VLSI design, signal integrity (SI) and power-ground integrity (PGI) have become very important to design in a short time. As a solution, we propose DEPOGIT, which is a new dense power-ground interconnect architecture that realizes more robust physical design integrity. This architecture is a method of running both the power and ground wires adjacent to the signal wires. This provides not only the general shielding effect but also explicit decoupling capacitance (decap) by means of the wires. Using this architecture also guarantees regularity, thus reducing manufacturing variations in interconnects.As a result of quantitative analysis performed using 90 nm technology node, we demonstrate that high-quality decap of over 50 nF in a 10 mm square chip can be obtained, the resistive IR-drop can be less than 20% of that of a conventional power grid, transient peak noise can be reduced by about 80%, and the inductive crosstalk effect of the signal wire can be greatly reduced.