Figures of merit to characterize the importance of on-chip inductance
DAC '98 Proceedings of the 35th annual Design Automation Conference
High-Speed Digital Circuits
Repeater insertion in tree structured inductive interconnect
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Meeting delay constraints in DSM by minimal repeater insertion
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Simultaneous shield insertion and net ordering under explicit RLC noise constraint
Proceedings of the 38th annual Design Automation Conference
Proceedings of the 38th annual Design Automation Conference
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
DEPOGIT: dense power-ground interconnect architecture for physical design integrity
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Physical limitations on the bit-rate of on-chip interconnects
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Interconnect RL extraction at a single representative frequency
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
A new RLC buffer insertion algorithm
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Accurate loop self inductance bound for efficient inductance screening
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Optimization of throughput performance for low-power VLSI interconnects
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hi-index | 0.00 |