Generating sparse partial inductance matrices with guaranteed stability
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Effects of inductance on the propagation delay and repeater insertion in VLSI circuits
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
On switch factor based analysis of coupled RC interconnects
Proceedings of the 37th Annual Design Automation Conference
Clocktree RLC extraction with efficient inductance modeling
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Interconnect Analysis and Synthesis
Interconnect Analysis and Synthesis
Quick On-Chip Self- and Mutual-Inductance Screen
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Optimum wire sizing of RLC interconnect with repeaters
Proceedings of the 13th ACM Great Lakes symposium on VLSI
Optimum wire sizing of RLC interconnect with repeaters
Integration, the VLSI Journal
On the impact of on-chip inductance on signal nets under the influence of power grid noise
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
| Hi-index | 0.00 |
A new approach to handle the inductance effect on multiple signal lines is presented. The worst case switching pattern is first identified. Then a numerical approach is used to model the effective loop inductance (Leff) for multiple lines. Based on look-up table for Leff, an equivalent single line model can be generated to decouple a specific signal line from the others to perform static timing analysis. Compared to the use of full RLC netlist for multiple lines, this approach greatly improves the computation efficiency and maintains accuracy for timing and signal integrity analysis. Applications to repeater insertion in the critical path chains are demonstrated. For a single line, the RLC model minimizes delay with fewer number of repeaters than RC model. However, for multiple lines, we find that same number of repeaters is inserted for optimal delay according to both the RC and RLC multiple line models.