Voltage scheduling problem for dynamically variable voltage processors
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Leakage control with efficient use of transistor stacks in single threshold CMOS
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
Real-time dynamic voltage scaling for low-power embedded operating systems
SOSP '01 Proceedings of the eighteenth ACM symposium on Operating systems principles
SODA '03 Proceedings of the fourteenth annual ACM-SIAM symposium on Discrete algorithms
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
A realistic variable voltage scheduling model for real-time applications
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
A scheduling model for reduced CPU energy
FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
Evaluating Run-Time Techniques for Leakage Power Reduction
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Design methodology for fine-grained leakage control in MTCMOS
Proceedings of the 2003 international symposium on Low power electronics and design
Proceedings of the 2003 international symposium on Low power electronics and design
Dynamic and Aggressive Scheduling Techniques for Power-Aware Real-Time Systems
RTSS '01 Proceedings of the 22nd IEEE Real-Time Systems Symposium
Leakage aware dynamic voltage scaling for real-time embedded systems
Proceedings of the 41st annual Design Automation Conference
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Online energy-aware I/O device scheduling for hard real-time systems
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Procrastination for leakage-aware rate-monotonic scheduling on a dynamic voltage scaling processor
Proceedings of the 2006 ACM SIGPLAN/SIGBED conference on Language, compilers, and tool support for embedded systems
High-level power management of embedded systems with application-specific energy cost functions
Proceedings of the 43rd annual Design Automation Conference
Energy efficient DVS schedule for fixed-priority real-time systems
ACM Transactions on Embedded Computing Systems (TECS) - Special Section LCTES'05
Cache leakage control mechanism for hard real-time systems
CASES '07 Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Procrastination Scheduling for Fixed-Priority Tasks with Preemption Thresholds
NPC '08 Proceedings of the IFIP International Conference on Network and Parallel Computing
Power-aware provisioning of Cloud resources for real-time services
Proceedings of the 7th International Workshop on Middleware for Grids, Clouds and e-Science
Energy reduction techniques for systems with non-DVS components
ETFA'09 Proceedings of the 14th IEEE international conference on Emerging technologies & factory automation
Energy-efficient scheduling on homogeneous multiprocessor platforms
Proceedings of the 2010 ACM Symposium on Applied Computing
Proceedings of the Conference on Design, Automation and Test in Europe
Energy reduction for scheduling a set of multiple feasible interval jobs
Journal of Systems Architecture: the EUROMICRO Journal
Reducing total energy for reliability-aware DVS algorithms
UIC'11 Proceedings of the 8th international conference on Ubiquitous intelligence and computing
Optimal procrastination interval for constrained deadline sporadic tasks upon uniprocessors
Proceedings of the 21st International conference on Real-Time Networks and Systems
A scheduling algorithm to reduce the static energy consumption of multiprocessor real-time systems
Proceedings of the 21st International conference on Real-Time Networks and Systems
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While the dynamic voltage scaling (DVS) techniques are efficient in reducing the dynamic energy consumption for the processor, varying voltage alone becomes less effective for the overall power reduction as the leakage power is growing rapidly, i.e., five times per technical generation as predicted. In this paper, we study the problem of reducing both the static and dynamic power consumption at the same time for the hard real-time system scheduled by the earliest deadline first (EDF) strategy. To balance the dynamic and leakage energy consumption, higher-than-necessary processor speeds may be required when executing real-time tasks, which can result in a large number of idle intervals. To effectively reduce the energy consumption during these idle intervals, we propose a technique that can effectively merge these scattered intervals into larger ones without causing any deadline miss. Simulation studies demonstrate the effectiveness of our approach. Specifically, our experiments show that the proposed technique can lead up to more than 80% idle energy savings than that by the previous ones.