Logic testing and design for testability
Logic testing and design for testability
IBM Journal of Research and Development
Reliable computer systems (2nd ed.): design and evaluation
Reliable computer systems (2nd ed.): design and evaluation
Randomized algorithms
Digital integrated circuits: a design perspective
Digital integrated circuits: a design perspective
Fault-tolerant computer system design
Fault-tolerant computer system design
A high-frequency custom CMOS S/390 microprocessor
IBM Journal of Research and Development - Special issue: IBM S/390 G3 and G4
A Design Diversity Metric and Analysis of Redundant Systems
IEEE Transactions on Computers
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Concurrent Error Detection Using Watchdog Processors-A Survey
IEEE Transactions on Computers
Stuck-Fault Tests vs. Actual Defects
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Modeling and Testing a Critical Fault-Tolerant Multi-Process System
FTCS '95 Proceedings of the Twenty-Fifth International Symposium on Fault-Tolerant Computing
Design Diversity for Concurrent Error Detection in Sequential Logic Circuts
VTS '01 Proceedings of the 19th IEEE VLSI Test Symposium
A Design Diversity Metric and Reliability Analysis for Redundant Systems
ITC '99 Proceedings of the 1999 IEEE International Test Conference
IBM S/390 parallel enterprise server G5 fault tolerance: a historical perspective
IBM Journal of Research and Development
| Hi-index | 14.98 |
Redundant systems are designed using multiple copies of the same resource (e.g., a logic network or a software module) in order to increase system dependability. Design diversity has long been used to protect redundant systems against common-mode failures. The conventional notion of diversity relies on "independent驴 generation of "different驴 implementations of the same logic function. In a recent paper, we presented a metric to quantify diversity among several designs. The problem of calculating the diversity metric is NP-complete (i.e., can be of exponential complexity). In this paper, we present efficient techniques to estimate the value of the design diversity metric. For datapath designs, we have formulated very fast techniques to calculate the value of the metric by taking advantage of the regularity in the datapath structures. For general combinational logic circuits, we present an adaptive Monte-Carlo simulation technique for estimating accurate bounds on the value of the metric.