An improved RF loopback for test time reduction
Proceedings of the conference on Design, automation and test in Europe: Proceedings
On-Chip Testing Techniques for RF Wireless Transceivers
IEEE Design & Test
A DFT Approach for Testing Embedded Systems Using DC Sensors
IEEE Design & Test
Reducing Test Time Using an Enhanced RF Loopback
Journal of Electronic Testing: Theory and Applications
System-on-Chip Test Architectures: Nanometer Design for Testability
System-on-Chip Test Architectures: Nanometer Design for Testability
An on-chip loopback block for RF transceiver built-in test
IEEE Transactions on Circuits and Systems II: Express Briefs
Fault Coverage Analysis of Peak-Detector Based BIST for RF LNAs
Journal of Electronic Testing: Theory and Applications
TLSync: support for multiple fast barriers using on-chip transmission lines
Proceedings of the 38th annual international symposium on Computer architecture
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A CMOS RF RMS detector is introduced. It generates a DC proportional to the RMS voltage amplitude of an RF signal. Its high input impedance and small silicon area make it suitable for the built-in testing (BIT) of critical RF blocks of a transceiver such as a Low Noise Amplifier (LNA) and Power Amplifier (PA) without affecting their performance and with minimum area overhead. The use of this structure in the fault detection and diagnosis of a wireless transceiver is described and illustrated with an example. The transistor-level implementation of the proposed circuit is discussed in detail. Post-layout simulation results using CMOS 0.35 驴m technology show that this testing device is able to perform an RF to DC conversion at 2.4GHz in a dynamic range of 20dB using an area of only 0.0135mm^2 and presenting an equivalent input capacitance of 22.5fF.