Power conscious fixed priority scheduling for hard real-time systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Run-time power control scheme using software feedback loop for low-power real-time application
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Low-energy intra-task voltage scheduling using static timing analysis
Proceedings of the 38th annual Design Automation Conference
A scheduling model for reduced CPU energy
FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
Synthesis Techniques for Low-Power Hard Real-Time Systems on Variable Voltage Processors
RTSS '98 Proceedings of the IEEE Real-Time Systems Symposium
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Off-chip latency-driven dynamic voltage and frequency scaling for an MPEG decoding
Proceedings of the 41st annual Design Automation Conference
Scheduling for reduced CPU energy
OSDI '94 Proceedings of the 1st USENIX conference on Operating Systems Design and Implementation
Power-aware scheduling and dynamic voltage setting for tasks running on a hard real-time system
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
System-wide energy minimization for real-time tasks: lower bound and approximation
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Energy management for real-time embedded systems with reliability requirements
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Frequency-aware energy optimization for real-time periodic and aperiodic tasks
Proceedings of the 2007 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
System-wide energy minimization for real-time tasks: Lower bound and approximation
ACM Transactions on Embedded Computing Systems (TECS)
Dynamic voltage scaling of supply and body bias exploiting software runtime distribution
Proceedings of the conference on Design, automation and test in Europe
Journal of Signal Processing Systems
UCC '13 Proceedings of the 2013 IEEE/ACM 6th International Conference on Utility and Cloud Computing
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This work presents a dynamic voltage and frequency scaling (DVFS) technique that minimizes the total system energy consumption for performing a task while satisfying a given execution time constraint. We first show that in order to guarantee minimum energy for task execution by using DVFS it is essential to divide the system power into active and standby power components. Next, we present a new DVFS technique, which considers not only the active power, but also the standby component of the system power. This is in sharp contrast with previous DVFS techniques, which only consider the active power component. We have implemented the proposed DVFS technique on the BitsyX platform - an Intel PXA255-based platform manufactured by ADS Inc., and report detailed power measurements on this platform. These measurements show that, compared to conventional DVFS techniques, an additional system energy saving of up to 18% can be achieved while satisfying the user-specified timing constraints.