Leakage control in FPGA routing fabric

  • Authors:
  • Suresh Srinivasan;A. Gayasen;N. Vijaykrishnan;T. Tuan

  • Affiliations:
  • Pennsylvania State University, University Park, PA;Pennsylvania State University, University Park, PA;Pennsylvania State University, University Park, PA;Xilinx Research Labs., San Jose, CA

  • Venue:
  • Proceedings of the 2005 Asia and South Pacific Design Automation Conference
  • Year:
  • 2005

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Abstract

As FPGA designs in 65nm are being explored, reducing leakage power becomes an important design issue. A significant portion of the FPGA leakage is expended in the unused multiplexers used in the interconnect fabric. This work focuses on reducing the leakage of these unused multiplexers by controlling their inputs. We investigate the design issues involved in implementing such a technique and also show experimental results demonstrating the effectiveness of our approach.