A Theory for Multiresolution Signal Decomposition: The Wavelet Representation
IEEE Transactions on Pattern Analysis and Machine Intelligence
IEEE Spectrum
VLSI implementation of discrete wavelet transform
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Discrete Wavelet Transform: Architectures, Design and Performance Issues
Journal of VLSI Signal Processing Systems
Architectures for the three-dimensional discrete wavelet transform
Architectures for the three-dimensional discrete wavelet transform
A VLSI architecture for lifting-based forward and inverse wavelettransform
IEEE Transactions on Signal Processing
IEEE Transactions on Signal Processing
Three-dimensional discrete wavelet transform architectures
IEEE Transactions on Signal Processing
Efficient architectures for 1-D and 2-D lifting-based wavelet transforms
IEEE Transactions on Signal Processing
Two fast architectures for the direct 2-D discrete wavelettransform
IEEE Transactions on Signal Processing
The wavelet transform, time-frequency localization and signal analysis
IEEE Transactions on Information Theory
IEEE Transactions on Consumer Electronics
Image compression using wavelet transform and multiresolution decomposition
IEEE Transactions on Image Processing
Line-based, reduced memory, wavelet image compression
IEEE Transactions on Image Processing
Image compression using the 2-D wavelet transform
IEEE Transactions on Image Processing
An efficient architecture for two-dimensional discrete wavelet transform
IEEE Transactions on Circuits and Systems for Video Technology
Lifting factorization-based discrete wavelet transform architecture design
IEEE Transactions on Circuits and Systems for Video Technology
Combined line-based architecture for the 5-3 and 9-7 wavelet transform of JPEG2000
IEEE Transactions on Circuits and Systems for Video Technology
A novel VLSI architecture for multidimensional discrete wavelet transform
IEEE Transactions on Circuits and Systems for Video Technology
IEEE Transactions on Circuits and Systems for Video Technology
Algorithms and architectures for 2D discrete wavelet transform
The Journal of Supercomputing
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Efficient array architectures for multi-dimensional (m-D) discrete wavelet transform (DWT), e.g. m=2,3, are presented, in which the lifting scheme of DWT is used to reduce efficiently hardware complexity. The parallelism of 2^m subbands transforms in lifting-based m-D DWT is explored, which increases efficiently the throughput rate of separable m-D DWT with fewer additional hardware overhead. The proposed architecture is composed of m2^m^-^1 1-D DWT modules working in parallel and pipelined, which is designed to process 2^m input samples per clock cycle, and generate 2^m subbands coefficients synchronously. The total time of achieving one level of decomposition for a 2-D image of size N^2 is approximately N^2/4 intra-clock cycles (ccs), and that for a 3-D image sequence of size MN^2 is approximately MN^2/8ccs. Efficient line-based architecture frameworks for both 2D+t (spatial domain decomposition first, followed by temporal directional decomposition) and t+2D (temporal directional decomposition first, followed by spatial domain decomposition) 3-D DWT are firstly proposed, as much as we know. Compared with the similar works reported in previous literature, the proposed architectures have good performance in terms of throughput rate and system output latency, and are good alternatives in tradeoff between throughput rate and hardware complexity. The proposed architectures are simple, regular, scalable and well suited for VLSI implementation.