EHSAT: an efficient RTL satisfiability solver using an extended DPLL procedure

Authors:
Shujun Deng;Jinian Bian;Weimin Wu;Xiaoqing Yang;Yanni Zhao
Affiliations:
Tsinghua University, Beijing, China;Tsinghua University, Beijing, China;Tsinghua University, Beijing, China;Tsinghua University, Beijing, China;Tsinghua University, Beijing, China
Venue:
Proceedings of the 44th annual Design Automation Conference
Year:
2007

Citing 11
Cited 0

GRASP—a new search algorithm for satisfiability

Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Boolean satisfiability in electronic design automation

Proceedings of the 37th Annual Design Automation Conference
LPSAT: a unified approach to RTL satisfiability

Proceedings of the conference on Design, automation and test in Europe
A machine program for theorem-proving

Communications of the ACM
Chaff: engineering an efficient SAT solver

Proceedings of the 38th annual Design Automation Conference
Efficient conflict driven learning in a boolean satisfiability solver

Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Validity Checking for Combinations of Theories with Equality

FMCAD '96 Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
Modeling and Verifying Systems Using a Logic of Counter Arithmetic with Lambda Expressions and Uninterpreted Functions

CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
An efficient finite-domain constraint solver for circuits

Proceedings of the 41st annual Design Automation Conference
Structural search for RTL with predicate learning

Proceedings of the 42nd annual Design Automation Conference
Functional vector generation for HDL models using linear programming and Boolean satisfiability

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Quantified Score

Hi-index	0.00

Visualization

Abstract

This paper presents an efficient algorithm to solve the satisfiability (SAT) problem for RTL designs using a complete hybrid branch-and-bound strategy with conflict-driven learning. The main framework is the extended Davis-Putnam-Logemann-Loveland procedure (DPLL) which is a unified procedure combining Boolean logic and arithmetic operations. A hybrid two-literal-watching scheme and interval reasoning based on RTL predicates are used as the powerful hybrid constraint propagation strategies. Conflict-based learning is also implemented as another important technique to enhance efficiency. Comparisons with a state-of-the-art RTL SAT solver, a SMT solver and an ILP solver show that EHSAT outperforms these solvers for RTL satisfiability problems.