Verifying correct pipeline implementation for microprocessors
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
A decision procedure for bit-vector arithmetic
DAC '98 Proceedings of the 35th annual Design Automation Conference
False path analysis based on hierarchical control representation
Proceedings of the 11th international symposium on System synthesis
Checking properties of safety critical specifications using efficient decision procedures
FMSP '98 Proceedings of the second workshop on Formal methods in software practice
Formal verification in hardware design: a survey
ACM Transactions on Design Automation of Electronic Systems (TODAES)
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Verifying Temporal Properties of Reactive Systems: A STeP Tutorial
Formal Methods in System Design
Using predicate abstraction to reduce object-oriented programs for model checking
FMSP '00 Proceedings of the third workshop on Formal methods in software practice
Scalable hybrid verification of complex microprocessors
Proceedings of the 38th annual Design Automation Conference
Model-checking infinite state-space systems with fine-grained abstractions using SPIN
SPIN '01 Proceedings of the 8th international SPIN workshop on Model checking of software
Automatic formal verification for scheduled VLIW code
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Formal Verification of Out-of-Order Execution with Incremental Flushing
Formal Methods in System Design
A General Setting for Flexibly Combining and Augmenting Decision Procedures
Journal of Automated Reasoning
BDD Based Procedures for a Theory of Equality with Uninterpreted Functions
Formal Methods in System Design
Automating Type Soundness Proofs via Decision Procedures and Guided Reductions
LPAR '02 Proceedings of the 9th International Conference on Logic for Programming, Artificial Intelligence, and Reasoning
Formal Verification of Descriptions with Distinct Order of Memory Operations
ASIAN '99 Proceedings of the 5th Asian Computing Science Conference on Advances in Computing Science
Combining Stream-Based and State-Based Verification Techniques
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Sequential Equivalence Checking by Symbolic Simulation
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Modeling and Verification of Out-of-Order Microprocessors in UCLID
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
On Solving Presburger and Linear Arithmetic with SAT
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
A DPLL-Based Calculus for Ground Satisfiability Modulo Theories
JELIA '02 Proceedings of the European Conference on Logics in Artificial Intelligence
Salsa: Combining Constraint Solvers with BDDs for Automatic Invariant Checking
TACAS '00 Proceedings of the 6th International Conference on Tools and Algorithms for Construction and Analysis of Systems: Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000
Software Construction and Analysis Tools for Future Space Missions
TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Combining Theorem Proving and Model Checking through Symbolic Analysis
CONCUR '00 Proceedings of the 11th International Conference on Concurrency Theory
Formal Verification of Designs with Complex Control by Symbolic Simulation
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
A Proof of Correctness of a Processor Implementing Tomasulo's Algorithm without a Reorder Buffer
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
A Generalization of Shostak's Method for Combining Decision Procedures
FroCoS '02 Proceedings of the 4th International Workshop on Frontiers of Combining Systems
A Rewrite Rule Based Framework for Combining Decision Procedures
FroCoS '02 Proceedings of the 4th International Workshop on Frontiers of Combining Systems
TABLEAUX '99 Proceedings of the International Conference on Automated Reasoning with Analytic Tableaux and Related Methods
RTA '02 Proceedings of the 13th International Conference on Rewriting Techniques and Applications
Transformations and Software Modeling Languages: Automating Transformations in UML
UML '02 Proceedings of the 5th International Conference on The Unified Modeling Language
Experience with Predicate Abstraction
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Automatic Verification of Combinatorial and Pipelined FFT
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
ICS: Integrated Canonizer and Solver
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
CVC: A Cooperating Validity Checker
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Checking Satisfiability of First-Order Formulas by Incremental Translation to SAT
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Formal Verification of a Reconfigurable Microprocessor
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
Range Allocation for Equivalence Logic
FST TCS '01 Proceedings of the 21st Conference on Foundations of Software Technology and Theoretical Computer Science
Finite Instantiations in Equivalence Logic with Uninterpreted Functions
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
A hybrid SAT-based decision procedure for separation logic with uninterpreted functions
Proceedings of the 40th annual Design Automation Conference
ICSM '01 Proceedings of the IEEE International Conference on Software Maintenance (ICSM'01)
Systematic Formal Verification of Interpreters
ICFEM '97 Proceedings of the 1st International Conference on Formal Engineering Methods
CONSIT: a fully automated conditioned program slicer
Software—Practice & Experience
An efficient finite-domain constraint solver for circuits
Proceedings of the 41st annual Design Automation Conference
Automatic abstraction and verification of verilog models
Proceedings of the 41st annual Design Automation Conference
Efficient Conflict-Based Learning in an RTL Circuit Constraint Solver
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Simplify: a theorem prover for program checking
Journal of the ACM (JACM)
Cutpoints for formal equivalence verification of embedded software
Proceedings of the 5th ACM international conference on Embedded software
ConSUS: a light-weight program conditioner
Journal of Systems and Software - Special issue: Software reverse engineering
Canonization for disjoint unions of theories
Information and Computation - Special issue: 19th international conference on automated deduction (CADE-19)
A randomized satisfiability procedure for arithmetic and uninterpreted function symbols
Information and Computation - Special issue: 19th international conference on automated deduction (CADE-19)
Refinement strategies for verification methods based on datapath abstraction
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
RTL SAT simplification by Boolean and interval arithmetic reasoning
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Predicate learning and selective theory deduction for a difference logic solver
Proceedings of the 43rd annual Design Automation Conference
Embedded software verification using symbolic execution and uninterpreted functions
International Journal of Parallel Programming
Accelerating high-level bounded model checking
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
EHSAT: an efficient RTL satisfiability solver using an extended DPLL procedure
Proceedings of the 44th annual Design Automation Conference
Refined typechecking with Stardust
PLPV '07 Proceedings of the 2007 workshop on Programming languages meets program verification
EufDpll - A Tool to Check Satisfiability of Equality Logic Formulas
Electronic Notes in Theoretical Computer Science (ENTCS)
Recursive Abstractions for Parameterized Systems
FM '09 Proceedings of the 2nd World Congress on Formal Methods
Combining SAT Methods with Non-Clausal Decision Heuristics
Electronic Notes in Theoretical Computer Science (ENTCS)
Cooperating Theorem Provers: A Case Study Combining HOL-Light and CVC Lite
Electronic Notes in Theoretical Computer Science (ENTCS)
Canonization for disjoint unions of theories
Information and Computation - Special issue: 19th international conference on automated deduction (CADE-19)
A randomized satisfiability procedure for arithmetic and uninterpreted function symbols
Information and Computation - Special issue: 19th international conference on automated deduction (CADE-19)
Information Sciences: an International Journal
CAV'07 Proceedings of the 19th international conference on Computer aided verification
A decision procedure for bit-vectors and arrays
CAV'07 Proceedings of the 19th international conference on Computer aided verification
An interpolation method for CLP traversal
CP'09 Proceedings of the 15th international conference on Principles and practice of constraint programming
CAV'11 Proceedings of the 23rd international conference on Computer aided verification
Validity checking for finite automata over linear arithmetic constraints
FSTTCS'06 Proceedings of the 26th international conference on Foundations of Software Technology and Theoretical Computer Science
Decision procedures for SAT, SAT modulo theories and beyond. the barcelogictools
LPAR'05 Proceedings of the 12th international conference on Logic for Programming, Artificial Intelligence, and Reasoning
Deciding separation logic formulae by SAT and incremental negative cycle elimination
LPAR'05 Proceedings of the 12th international conference on Logic for Programming, Artificial Intelligence, and Reasoning
A SAT-based decision procedure for mixed logical/integer linear problems
CPAIOR'05 Proceedings of the Second international conference on Integration of AI and OR Techniques in Constraint Programming for Combinatorial Optimization Problems
A scalable method for solving satisfiability of integer linear arithmetic logic
SAT'05 Proceedings of the 8th international conference on Theory and Applications of Satisfiability Testing
A fast linear-arithmetic solver for DPLL(T)
CAV'06 Proceedings of the 18th international conference on Computer Aided Verification
Testing deadlock-freeness in real-time systems: a formal approach
FATES'04 Proceedings of the 4th international conference on Formal Approaches to Software Testing
SDSAT: tight integration of small domain encoding and lazy approaches in a separation logic solver
TACAS'06 Proceedings of the 12th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Assertion checking over combined abstraction of linear arithmetic and uninterpreted functions
ESOP'06 Proceedings of the 15th European conference on Programming Languages and Systems
Producing and verifying extremely large propositional refutations
Annals of Mathematics and Artificial Intelligence
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