Checking Sequence Generation for Asynchronous Sequential Elements
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Optimizing the Length of Checking Sequences
IEEE Transactions on Computers
Enhancing Testability of Large-Scale Integrated Circuits via Test Points and Additional Logic
IEEE Transactions on Computers
Algorithms ror Designing Fault-Detection Experiments ror Sequential Machines
IEEE Transactions on Computers
IEEE Transactions on Computers
Boolean Differential Calculus and its Application to Switching Theory
IEEE Transactions on Computers
SCIRTSS: A Search System for Sequential Circuit Test Sequences
IEEE Transactions on Computers
A Method for the Design of Fault Detection Experiments
IEEE Transactions on Computers
Fault-Detection Experiments for Parallel-Decomposable Sequential Machines
IEEE Transactions on Computers
Generating Checking Sequences for Partial Reduced Finite State Machines
TestCom '08 / FATES '08 Proceedings of the 20th IFIP TC 6/WG 6.1 international conference on Testing of Software and Communicating Systems: 8th International Workshop
A strategy for detecting faults in sequential machines not possessing distinguishing sequences
AFIPS '70 (Fall) Proceedings of the November 17-19, 1970, fall joint computer conference
Eliminating redundant tests in a checking sequence
TestCom'05 Proceedings of the 17th IFIP TC6/WG 6.1 international conference on Testing of Communicating Systems
Hi-index | 15.01 |
Abstract A variable-length distinguishing sequence (VLDS) is a preset distinguishing sequence X0 such that, if the machine is started in an unknown state, the output response of the machine to some prefix of X0 will identify the initial state. The length of the required prefix is a function of the initial state. The properties of such sequences are investigated and a method which employs a modified version of the diagnosing tree is developed for generating and displaying all such sequences. The fixed-length distinguishing sequence (FLDS) is shown to be a special case of the more general VLDS. The VLDS is next applied in the design of simple and efficient preset fault-detection experiments for sequential machines.