Registers for phase difference based logic

Authors:
D. Shang;A. Yakovlev;A. Koelmans;D. Sokolov;A. Bystrov
Affiliations:
School of Electrical, Electronic, and Computer Engineering, University of Newcastle upon Tyne, UK;School of Electrical, Electronic, and Computer Engineering, University of Newcastle upon Tyne, UK;School of Electrical, Electronic, and Computer Engineering, University of Newcastle upon Tyne, UK;School of Electrical, Electronic, and Computer Engineering, University of Newcastle upon Tyne, UK;School of Electrical, Electronic, and Computer Engineering, University of Newcastle upon Tyne, UK
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2007

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Abstract

A logic design style known as phase difference-based logic (PDBL) has several benefits with respect to security and testing. An existing design method for PDBL circuits has so far been lacking an important component, a register. In this paper, we present the design of a speed independent PDBL register and a timed PDBL register, which can be used in asynchronous or synchronous circuits. Comparisons are presented in terms of speed, size, and power consumption.