A unified methodology for power supply noise reduction in modern microarchitecture design

Authors:
Michael Healy;Fayez Mohamood;Hsien-Hsin S. Lee;Sung Kyu Lim
Affiliations:
Georgia Institute of Technology;Georgia Institute of Technology;Georgia Institute of Technology;Georgia Institute of Technology
Venue:
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Year:
2008

Citing 12
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Abstract

In this paper, we present a novel design methodology to combat the ever-aggravating high frequency power supply noise (di/dt) in modern microprocessors. Our methodology integrates microarchitectural profiling for noise-aware floorplanning, dynamic runtime noise control to prevent unsustainable noise emergencies, as well as decap allocation; all to produce a design for the average-case current consumption scenario. The dynamic controller contributes a microarchitectural technique to eliminate occurences of the worst-case noise scenario thus our method focuses on average-case noise behavior.