Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization

• Authors: Kim Hazelwood;David Brooks
• Venue: Proceedings of the 2004 international symposium on Low power electronics and design
• Year: 2004

Microprocessor designers use techniques such as clock gating toreduce power dissipation. An unfortunate side-effect of thesetechniques is the processor current fluctuations that stress thepower-delivery network. Recent research has focused onhardware-only mechanisms to detect and eliminate thesefluctuations. While the solutions have been effective at avoidingoperating-range violations, they have done so at a performancepenalty to the executing program.Compilers are well equipped to rearrange instructions such thatcurrent fluctuations are less dramatic, with minimal performanceimplications. Furthermore, a dynamic optimizer can eliminate theproblem at run time, avoiding the difficult task of staticallypredicting voltage emergencies.This paper proposes complementing existing hardware solutionswith additional run-time software to address problematic codesequences that cause recurring voltage swings. Our proposal extendsexisting hardware techniques to additionally provide feedback to adynamic optimizer, which can provide a long-term solution, oftenwithout impacting the performance of the executing application.We found that recurring voltage fluctuations do exist in theSPEC2000 benchmarks, and that given very little information fromthe hardware, a dynamic optimizer can locate and correct many ofthe recurring voltage emergencies.