Tiny split data-caches make big performance impact for embedded applications

Authors:
Afrin Naz;Krishna Kavi;Wentong Li;Philip Sweany
Affiliations:
Department of Computer Science and Engineering, The University of North Texas, 3940 North Elm street, Denton, TX 76206-1366, USA;(Correspd. Tel.: +1 940 565 2767/ E-mail: kavi@cse.unt.edu) Department of Computer Science and Engineering, The University of North Texas, 3940 North Elm street, Denton, TX 76206-1366, USA;Department of Computer Science and Engineering, The University of North Texas, 3940 North Elm street, Denton, TX 76206-1366, USA;Department of Computer Science and Engineering, The University of North Texas, 3940 North Elm street, Denton, TX 76206-1366, USA
Venue:
Journal of Embedded Computing - Issues in embedded single-chip multicore architectures
Year:
2006

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Abstract

This paper shows that even very small data caches, when split to serve data streams exhibiting temporal and spatial localities, can improve performance of embedded applications without consuming excessive silicon real estate or power. It also shows that large block sizes or higher set-associativities are unnecessary with split cache organizations. We use benchmark programs from MiBench to show that our cache organization outperforms other organizations in terms of miss rates, access times, energy consumption and silicon area.