The reconfigurable instruction cell array

  • Authors:
  • Sami Khawam;Ioannis Nousias;Mark Milward;Ying Yi;Mark Muir;Tughrul Arslan

  • Affiliations:
  • Spiral Gateway, Edinburgh, U.K.;School of Engineering and Electronics, University of Edinburgh, Edinburgh, U.K. and Spiral Gateway, Edinburgh U.K.;Spiral Gateway, Edinburgh, U.K.;School of Engineering and Electronics, University of Edinburgh, Edinburgh, U.K.;Spiral Gateway, Edinburgh, U.K.;School of Engineering and Electronics, University of Edinburgh, Edinburgh, U.K. and Spiral Gateway, Edinburgh U.K.

  • Venue:
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Year:
  • 2008

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Abstract

This paper presents a novel instruction cell-based re-configurable computing architecture for low-power applications, thereafter referred to as the reconfigurable instruction cell array (RICA). For the development of the RICA, a top-down software driven approach was taken and revealed as one of the key design decisions for a flexible, easy to program, low-power architecture. These features make RICA an architecture that inherently solves the main design requirements of modern low-power devices. Results show that it delivers considerably less power consumption when compared to leading VLIW and low-power digital signal processors, but still maintaining their throughput performance.