Reducing bus delay in submicron technology using coding
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Bus encoding to prevent crosstalk delay
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Analysis and Avoidance of Cross-Talk in On-Chip Buses
HOTI '01 Proceedings of the The Ninth Symposium on High Performance Interconnects
A Crosstalk Aware Interconnect with Variable Cycle Transmission
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Area and Energy-Efficient Crosstalk Avoidance Codes for On-Chip Buses
ICCD '04 Proceedings of the IEEE International Conference on Computer Design
Delay and Energy Efficient Data Transmission for On-Chip Buses
ISVLSI '06 Proceedings of the IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures
Low-power bus encoding using an adaptive hybrid algorithm
Proceedings of the 43rd annual Design Automation Conference
Exploiting on-chip data behavior for delay minimization
Proceedings of the 2007 international workshop on System level interconnect prediction
Bus encoding schemes for minimizing delay in VLSI interconnects
Proceedings of the 20th annual conference on Integrated circuits and systems design
NCXplore: a design space exploration framework of temporal encoding for on-chip serial interconnects
International Journal of High Performance Systems Architecture
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In this paper we propose two bus encoding algorithms that optimize both bus delay and energy dissipation based on the probabilistic characteristics of data on data buses. The first algorithm minimizes the crosstalk transitions by inserting temporal redundancy and achieves optimal energy. The second algorithm reduces crosstalk more aggressively to achieve optimal bus delay by mapping the original data to low-energy opposite-transition-forbidden codes. Experimental results show that they outperform the existing heuristic bus encoding algorithms by 15.7% to 58.8% in average energy dissipation and 11.4% to 58.4% in average delay.