A new addition scheme and fast scaling factor compensation methods for CORDIC algorithms
Integration, the VLSI Journal
High Performance Rotation Architectures Based on the Radix-4 CORDIC Algorithm
IEEE Transactions on Computers
Computer arithmetic: algorithms and hardware designs
Computer arithmetic: algorithms and hardware designs
Application of Reconfigurable CORDIC Architectures
Journal of VLSI Signal Processing Systems - Special issue on VLSI on custom computing technology
Evaluation of CORDIC Algorithms for FPGA Design
Journal of VLSI Signal Processing Systems
The Electronic Numerical Integrator and Computer (ENIAC)
IEEE Annals of the History of Computing
CORDIC Architectures with Parallel Compensation of the Scale Factor
ASAP '95 Proceedings of the IEEE International Conference on Application Specific Array Processors
Decimal Floating-Point: Algorism for Computers
ARITH '03 Proceedings of the 16th IEEE Symposium on Computer Arithmetic (ARITH-16'03)
A High-Frequency Decimal Multiplier
ICCD '04 Proceedings of the IEEE International Conference on Computer Design
High-Throughput CORDIC-Based Geometry Operations for 3D Computer Graphics
IEEE Transactions on Computers
High-Speed Multioperand Decimal Adders
IEEE Transactions on Computers
Decimal Multiplication with Efficient Partial Product Generation
ARITH '05 Proceedings of the 17th IEEE Symposium on Computer Arithmetic
Design of a compact reversible binary coded decimal adder circuit
Journal of Systems Architecture: the EUROMICRO Journal
A Cordic Arithmetic Processor Chip
IEEE Transactions on Computers
Fourier Transform Computers Using CORDIC Iterations
IEEE Transactions on Computers
The use of CORDIC in software defined radios: a tutorial
IEEE Communications Magazine
Hi-index | 0.00 |
Although radix 10 based arithmetic has been gaining renewed importance over the last few years, decimal systems are not efficient enough and techniques are still under development. In this paper, an improvement of the CORDIC (coordinate rotation digital computer) method for decimal representation is proposed and applied to produce fast rotations. The algorithm uses BCD operands as inputs, combining the advantages of both decimal and binary systems. The result is a reduction of 50% in the number of iterations if compared with the original Decimal CORDIC method. Finally, we present a hardware architecture useful to produce BCD coordinates rotations accurately and fast, and different experiments demonstrating the advantages of the new method are shown. A reduction of 75% in a single stage delay is obtained, whereas the circuit area just increases in about 5%.