Bandwidth availability of multiple-bus multiprocessors
IEEE Transactions on Computers
A semi-markov model for the performance of multiple-bus systems
IEEE Transactions on Computers
Exact performance estimates for multiprocessor memory and bus interference
IEEE Transactions on Computers
Performance Analysis of Multistage Interconnection Networks with Hierarchical Requesting Model
IEEE Transactions on Computers
Interference in multiprocessor computer systems with interleaved memory
Communications of the ACM
Performance Model for a Prioritized Multiple-Bus Multiprocessor System
IEEE Transactions on Computers
Performance Analysis of Multilevel Bus Networks for Hierarchical Multiprocessors
IEEE Transactions on Computers
IEEE Transactions on Parallel and Distributed Systems
Bounding the gain of changing the number of memory modules in shared memory multiprocessors
Nordic Journal of Computing
IPPS '96 Proceedings of the 10th International Parallel Processing Symposium
Modeling and analysis of the system bus latency on the SoC platform
Proceedings of the 2006 international workshop on System-level interconnect prediction
CPMBK: An improved cluster-based interconnection network
International Journal of Computer Applications in Technology
| Hi-index | 14.99 |
The authors study the performance of multiprocessor systems employing multiple buses as the interconnection networks under a nonuniform requesting model, called the hierarchical requesting model. The effective memory bandwidth is chosen as the performance measure. The networks investigated include multiple bus networks with full bus-memory connection, multiple bus networks with single bus-memory connection, and multiple bus networks with partial bus-memory connection. The authors also propose a type of multiple bus network with partial bus-memory connection, called partial bus networks with K classes. The N costs and fault-tolerant capabilities of the multiple bus networks are also evaluated and compared to one another. It is shown that the partial bus networks with K classes are useful in applications requiring high performance and degree of fault tolerance with moderate cost.