Global scheduling independent of control dependencies based on condition vectors
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Relative scheduling under timing constraints
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Scheduling under resource constraints and module assignment
Integration, the VLSI Journal
High-level synthesis: introduction to chip and system design
High-level synthesis: introduction to chip and system design
The Princeton University behavioral synthesis system
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
MAHA: a program for datapath synthesis
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Allocation and scheduling of conditional task graph in hardware/software co-synthesis
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the 39th annual Design Automation Conference
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Low power system scheduling and synthesis
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
An integrated data path optimization for low power based on network flow method
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
A low power scheduler using game theory
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Some Experiments in Local Microcode Compaction for Horizontal Machines
IEEE Transactions on Computers
Sensor temperature for a low-power low-voltage self-powered system using vibration scavenging
ICC'07 Proceedings of the 11th Conference on Proceedings of the 11th WSEAS International Conference on Circuits - Volume 11
Benchmarking in digital circuit design automation
WSEAS Transactions on Circuits and Systems
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As semiconductor technology scales down, integration on a chip becomes higher and concerns complex algorithm implementation. Those algorithms concern plenty of applications in many fields. Thus, adequate scheduling techniques that cope with such a variety of applications are required. The method presented in this paper addresses that concern and takes advantage of both data flow and control flow approaches. Knowing that such a Controlled Data Flow Graph (CDFG) scheduling is not polynomial, an efficient heuristic-based approach is then needed. In addition, because time and resources are user-constraints that gain a particular attention, our heuristic-based method targets a minimal number of cycles. More, it detects exclusive operations of the same type that can be scheduled in the same control step and share the same resource. Because the power dissipation is a crucial problem for SOC designs, our tool automatically introduces additional constraints so that the switching power dissipation at a high design level is reduced.