Fast false path identification based on functional unsensitizability using RTL information

Authors:
Yuki Yoshikawa;Satoshi Ohtake;Tomoo Inoue;Hideo Fujiwara
Affiliations:
Hiroshima City University, Hiroshima, Japan;Nara Institute of Science and Technology, Kansai Science City, Japan;Hiroshima City University, Hiroshima, Japan;Nara Institute of Science and Technology, Kansai Science City, Japan
Venue:
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Year:
2009

Citing 11
Cited 1

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Abstract

In this paper, we propose a method for identifying false paths based on functional unsensitizability of path delay faults. By using RTL structural information, a number of gate level paths are bound into an RTL path and the bundle of them can be identified in a reasonable amount of time. The identified false paths are useful for over-testing reduction caused by DFT techniques, such as scan design, and also area and performance optimization of circuits during logic synthesis. Experimental results show that our proposed method can identify false paths in a few seconds for several benchmarks.