Hardware generation of arbitrary random number distributions from uniform distributions via the inversion method

Authors:
Ray C. C. Cheung;Dong-U Lee;Wayne Luk;John D. Villasenor
Affiliations:
Department of Computing, Imperial College London, London, U.K.;Electrical Engineering Department, University of California, Los Angeles, CA;Department of Computing, Imperial College London, London, U.K.;Electrical Engineering Department, University of California, Los Angeles, CA
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2007

Citing 13
Cited 5

A guide to simulation (2nd ed.)

A guide to simulation (2nd ed.)
Maximally equidistributed combined Tausworthe generators

Mathematics of Computation
Elementary functions: algorithms and implementation

Elementary functions: algorithms and implementation
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms

The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
The Symmetric Table Addition Method for Accurate Function Approximation

Journal of VLSI Signal Processing Systems
Design of High Speed AWGN Communication Channel Emulator

Analog Integrated Circuits and Signal Processing
Efficient BRDF importance sampling using a factored representation

ACM SIGGRAPH 2004 Papers
High-Speed Function Approximation Using a Minimax Quadratic Interpolator

IEEE Transactions on Computers
Multipartite Table Methods

IEEE Transactions on Computers
Optimizing Hardware Function Evaluation

IEEE Transactions on Computers
A Hardware Gaussian Noise Generator Using the Box-Muller Method and Its Error Analysis

IEEE Transactions on Computers
Efficient Hardware Generation of Random Variates with Arbitrary Distributions

FCCM '06 Proceedings of the 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Accuracy-Guaranteed Bit-Width Optimization

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

An FPGA Run-Time Parameterisable Log-Normal Random Number Generator

ARC '08 Proceedings of the 4th international workshop on Reconfigurable Computing: Architectures, Tools and Applications
A comparison of CPUs, GPUs, FPGAs, and massively parallel processor arrays for random number generation

Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
High-Performance Quasi-Monte Carlo Financial Simulation: FPGA vs. GPP vs. GPU

ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Implementation of the Longstaff and Schwartz American Option Pricing Model on FPGA

Journal of Signal Processing Systems
A hardware efficient random number generator for nonuniform distributions with arbitrary precision

International Journal of Reconfigurable Computing - Special issue on Selected Papers from the International Conference on Reconfigurable Computing and FPGAs (ReConFig'10)

Quantified Score

Hi-index	0.00

Visualization

Abstract

We present an automated methodology for producing hardware-based random number generator (RNG) designs for arbitrary distributions using the inverse cumulative distribution function (ICDF). The ICDF is evaluated via piecewise polynomial approximation with a hierarchical segmentation scheme that involves uniform segments and segments with size varying by powers of two which can adapt to local function nonlinearities. Analytical error analysis is used to guarantee accuracy to one unit in the last place (ulp). Compact and efficient RNGs that can reach arbitrary multiples of the standard deviation σ can be generated. For instance, a Gaussian RNG based on our approach for a Xilinx Virtex-4 XC4VLX100-12 field-programmable gate array produces 16-bit random samples up to 8.2σ. It occupies 487 slices, 2 block-RAMs, and 2 DSP-blocks. The design is capable of running at 371 MHz and generates one sample every clock cycle.