On K-LUT based FPGA optimum delay and optimal area mapping

Authors:
Ion Bucur;Ioana Fagarasan;Cornel Popescu;Costin-Anton Boiangiu;George Culea
Affiliations:
Faculty of Automatic Control and Computers, University Politehnica of Bucharest, Bucharest, Romania;Faculty of Automatic Control and Computers, University Politehnica of Bucharest, Bucharest, Romania;Faculty of Automatic Control and Computers, University Politehnica of Bucharest, Bucharest, Romania;Faculty of Automatic Control and Computers, University Politehnica of Bucharest, Bucharest, Romania;University of Bacau, Bacau, Romania
Venue:
MACMESE'08 Proceedings of the 10th WSEAS international conference on Mathematical and computational methods in science and engineering
Year:
2008

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Abstract

We developed, using structures from MV-SIS, an application dedicated to K-LUT based FPGA synthesis, named Xsynth. Main component of it, levelMap the mapping program, was implemented using the minDepth algorithm. The mapping program was instrumented in order to study and evaluate different heuristics involved in establishing best approach to find optimum delay and optimal area mapping. We did run our mapping application on many circuits from the MCNC and IWLS 2005 benchmark circuits and we obtained good results. We present our main model, procedures, measurement results and brief comparison with previous published relevant similar mapping algorithms.