The theory of signature testing for VLSI
STOC '82 Proceedings of the fourteenth annual ACM symposium on Theory of computing
An Advanced Fault Isolation System for Digital Logic
IEEE Transactions on Computers
Syndrome-Testable Design of Combinational Circuits
IEEE Transactions on Computers
Measures of the Effectiveness of Fault Signature Analysis
IEEE Transactions on Computers
Testing by Feedback Shift Register
IEEE Transactions on Computers
Comments on 'Signature Analysis for Multiple Output Circuits' by R. David
IEEE Transactions on Computers
Cellular automata circuits for built-in self test
IBM Journal of Research and Development
Cellular Automata-Based Signature Analysis for Built-In Self-Test
IEEE Transactions on Computers
Analysis and Design of Linear Finite State Machines for Signature Analysis Testing
IEEE Transactions on Computers
Programmable BIST Space Compactors
IEEE Transactions on Computers
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A scheme of a good signature analysis by a linear feedback shift register (LFSR) is presented. It works for k-output circuits, even if k is greater than the register length. It is built according to rules which are presented in the correspondence, taking into account error models which are introduced. The rules are derived from a property which is formally shown for one kind of LFSR. However, some of them apply to other LFSR schemes too.