The Image Chip for High Performance 3D Rendering

  • Authors:
  • Graham J. Dunnett;Martin White;Paul F. Lister;Richard L. Grimsdale

  • Affiliations:
  • -;-;-;-

  • Venue:
  • IEEE Computer Graphics and Applications
  • Year:
  • 1992

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Abstract

The Image chip, which accelerates 3D rendering algorithms base on Bresenham's line drawing and Pineda's parallel polygon drawing algorithms, is discussed. With these algorithms, Image can directly draw lines, spans, and triangles in wireframe, hidden-line, and Gouraud-shading modes. Image also directly antialiases vectors or provides antialiasing information to enhance antialiasing of vectors or triangles. Image's operation, separation into layers to maximize performance and simplify the input and output interfaces, and support of advanced rendering effects such as Phong shading and texture mapping are described. The designs of Image's internal architecture, host interface, and memory interface are also described.