Performance of optical flow techniques
International Journal of Computer Vision
Improved Accuracy in Gradient-Based Optical Flow Estimation
International Journal of Computer Vision
Accuracy vs efficiency trade-offs in optical flow algorithms
Computer Vision and Image Understanding
Real-Time Implementation of an Optical Flow Algorithm
ICPR '02 Proceedings of the 16 th International Conference on Pattern Recognition (ICPR'02) Volume 4 - Volume 4
Superpipelined high-performance optical-flow computation architecture
Computer Vision and Image Understanding
Hardware implementation of optical flow constraint equation using FPGAs
Computer Vision and Image Understanding
A duality based approach for realtime TV-L1 optical flow
Proceedings of the 29th DAGM conference on Pattern recognition
GPU-based multigrid: real-time performance in high resolution nonlinear image processing
ICVS'08 Proceedings of the 6th international conference on Computer vision systems
Fine grain pipeline systems for real-time motion and stereo-vision computation
International Journal of High Performance Systems Architecture
A Database and Evaluation Methodology for Optical Flow
International Journal of Computer Vision
Variational optical flow computation in real time
IEEE Transactions on Image Processing
Optical flow estimation using temporally oversampled video
IEEE Transactions on Image Processing
Domain decomposition for variational optical-flow computation
IEEE Transactions on Image Processing
B-Spline Image Model for Energy Minimization-Based Optical Flow Estimation
IEEE Transactions on Image Processing
Overview of research efforts on media ISA extensions and their usage in video coding
IEEE Transactions on Circuits and Systems for Video Technology
FPGA-based real-time optical-flow system
IEEE Transactions on Circuits and Systems for Video Technology
Fast Block Motion Estimation With 8-Bit Partial Sums Using SIMD Architectures
IEEE Transactions on Circuits and Systems for Video Technology
Multi-port abstraction layer for FPGA intensive memory exploitation applications
Journal of Systems Architecture: the EUROMICRO Journal
Fine grain pipeline architecture for high performance phase-based optical flow computation
Journal of Systems Architecture: the EUROMICRO Journal
Optical flow reliability model approximated with RBF
IWANN'11 Proceedings of the 11th international conference on Artificial neural networks conference on Advances in computational intelligence - Volume Part II
A multi-resolution approach for massively-parallel hardware-friendly optical flow estimation
Journal of Visual Communication and Image Representation
Pipelined architecture for real-time cost-optimized extraction of visual primitives based on FPGAs
Digital Signal Processing
Parallel architecture for hierarchical optical flow estimation based on FPGA
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
On-chip semidense representation map for dense visual features driven by attention processes
Journal of Real-Time Image Processing
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In this paper, we describe the high-performance implementation of an optical-flow algorithm that takes advantage of the processor's architecture. Tuning the code, i.e., adapting it to take full advantage of the processor, is challenging, time consuming, and requires efficient programming at different levels but can lead to significant improvements in performance. The optimized implementation presented here is highly interesting for a number of applications since it delivers real-time motion estimations at high-image resolution on a PC or in an embedded system based on a general-purpose processor. In a 2.83 GHz Core 2 Quad PC, it achieves a speedup of 14 compared to our first code version and 2052.7 f/s for the well-known 252×316 Yosemite sequence, and a speedup of 17.6 and 68.5 f/s for a 1016×1280 sequence. But the description of how this high-performance is achieved goes beyond a specific application since the paper presented here illustrates how inherently dense, low-level visual algorithms (pixel-wise computation) can be structured and improved to take full advantage of a standard processor. The implementation is compared with other hardware (based on FPGAs and GPUs) and software (based on clusters, PCs, and special-purpose processors) optical-flow implementations, showing that it outperforms them.