Systematic customization of on-chip crossbar interconnects

  • Authors:
  • Jae Young Hur;Todor Stefanov;Stephan Wong;Stamatis Vassiliadis

  • Affiliations:
  • Computer Engineering Lab., TU Delft, The Netherlands;Leiden Embedded Research Center, Leiden University, The Netherlands;Computer Engineering Lab., TU Delft, The Netherlands;Computer Engineering Lab., TU Delft, The Netherlands

  • Venue:
  • ARC'07 Proceedings of the 3rd international conference on Reconfigurable computing: architectures, tools and applications
  • Year:
  • 2007

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Abstract

In this paper, we present a systematic design and implementation of reconfigurable interconnects on demand. The proposed on-chip interconnection network provides identical physical topologies to logical topologies for given applications. The network has been implemented with parameterized switches, dynamically multiplexed by a traffic controller. Considering practical media applications, a multiprocessor system combined with the presented network has been integrated and prototyped in Virtex-II Pro FPGA using the ESPAM design environment. The experiment shows that the network realizes on-demand traffic patterns, occupies on average 59% less area, and maintains performance comparable with a conventional crossbar.