Fundamentals of modern VLSI devices
Fundamentals of modern VLSI devices
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Scaling of stack effect and its application for leakage reduction
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Leakage control with efficient use of transistor stacks in single threshold CMOS
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Design of High-Performance Microprocessor Circuits
Design of High-Performance Microprocessor Circuits
Proceedings of the 2003 international symposium on Low power electronics and design
Double-gate SOI devices for low-power and high-performance applications
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Ultra-Low Voltage Nanoscale Memories (Series on Integrated Circuits and Systems)
Ultra-Low Voltage Nanoscale Memories (Series on Integrated Circuits and Systems)
Leakage in Nanometer CMOS Technologies (Series on Integrated Circuits and Systems)
Leakage in Nanometer CMOS Technologies (Series on Integrated Circuits and Systems)
Analysis and comparison on full adder block in submicron technology
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Models and algorithms for bounds on leakage in CMOS circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Comparative evaluation of layout density in 3T, 4T, and MT FinFET standard cells
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An improved common-mode feedback loop for the differential-difference amplifier
Analog Integrated Circuits and Signal Processing
Mixed FBB/RBB: a novel low-leakage technique for FinFET forced stacks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Ultra-low leakage arithmetic circuits using symmetric and asymmetric finFETs
Journal of Electrical and Computer Engineering
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In this paper, we study the advantages offered by multi-gate fin FETs (FinFETs) over traditional bulk MOSFETs when low standby power circuit techniques are implemented. More precisely, we simulated various vehicle circuits, ranging from ring oscillators to mirror full adders, to investigate the effectiveness of back biasing and transistor-stacking in both FinFETs and bulk MOSFETs. The opportunity to separate the gates of FinFETs and to operate them independently has been systematically analyzed; mixed connected- and independent-gate circuits have also been evaluated. The study spans over the device, the layout, and the circuit level of abstraction and appropriate figures of merit are introduced to quantify the potential advantage of different schemes. Our results show that, thanks to a larger threshold voltage sensitivity to back biasing, the FinFET technology is able to offer a more favorable compromise between standby power consumption and dynamic performance and is well suited for implementing fast and energy-efficient adaptive back-biasing strategies.