A novel x-ploiting strategy for improving performance of test data compression

Authors:
Maoxiang Yi;Huaguo Liang;Lei Zhang;Wenfa Zhan
Affiliations:
Department of Electronic Science and Technology, Hefei University of Technology, Hefei, China;School of Computer and Information, Hefei University of Technology, Hefei, China;School of Computer and Information, Hefei University of Technology, Hefei, China;Department of Electronic Science and Technology, Hefei University of Technology, Hefei, China
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2010

Citing 10
Cited 2

Scan Vector Compression/Decompression Using Statistical Coding

VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Multiscan-Based Test Compression and Hardware Decompression Using LZ77

ITC '02 Proceedings of the 2002 IEEE International Test Conference
Test Data Compression and Test Resource Partitioning for System-on-a-Chip Using Frequency-Directed Run-Length (FDR) Codes

IEEE Transactions on Computers
RL-huffman encoding for test compression and power reduction in scan applications

ACM Transactions on Design Automation of Electronic Systems (TODAES)
An Efficient Data-Independent Technique for Compressing Test Vectors in Systems-on-a-Chip

ISVLSI '06 Proceedings of the IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures
Test Data Compression by Spilt-VIHC (SVIHC)

ICCTA '07 Proceedings of the International Conference on Computing: Theory and Applications
Optimal Selective Huffman Coding for Test-Data Compression

IEEE Transactions on Computers
Nine-coded compression technique for testing embedded cores in socs

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An efficient test vector compression scheme using selective Huffman coding

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Relationship Between Entropy and Test Data Compression

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

A new scheme of test data compression based on equal-run-length coding (ERLC)

Integration, the VLSI Journal
Efficient Test Compression Technique for SoC Based on Block Merging and Eight Coding

Journal of Electronic Testing: Theory and Applications

Quantified Score

Hi-index	0.00

Visualization

Abstract

A precomputed core test set contains a large number of don't cares (x's) that can be effectively exploited to improve test data compression (TDC). Extending pattern run-length coding, we present a novel strategy that propagates the x's of a reference pattern to a new reference pattern in such a way that the reference pattern is XOR-ed with the pattern to be encoded. The x-propagating strategy can increase the probability of a reference pattern being coding-compatible with the pattern to be encoded, and its validity can be established by filling some x's of the already encoded patterns in backtracing way. How our strategy is used for TDC is demonstrated. Experimental results for large ISCAS89 benchmarks show that, compared to the recently proposed schemes, our technique can effectively improve compression and simplify on-chip decoder, and work better when used for core-unified TDC.