IEEE Transactions on Software Engineering
Empirical evaluation of some high-level synthesis scheduling heuristics
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
MAHA: a program for datapath synthesis
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Estimating Lower-Bound Performance of Schedules Using a Relaxation Technique
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
InSyn: integrated scheduling for DSP applications
DAC '93 Proceedings of the 30th international Design Automation Conference
Identification and exploitation of symmetries in DSP algorithms
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Multiple behavior module synthesis based on selective groupings
Proceedings of the conference on Design, automation and test in Europe
Lower bound estimation of hardware resources for scheduling in high-level synthesis
Journal of Computer Science and Technology
The QC-2 parallel Queue processor architecture
Journal of Parallel and Distributed Computing
Design and architecture for an embedded 32-bit QueueCore
Journal of Embedded Computing - Issues in embedded single-chip multicore architectures
Design of multi-mode application-specific cores based on high-level synthesis
Integration, the VLSI Journal
Share with care: a quantitative evaluation of sharing approaches in high-level synthesis
Proceedings of the Conference on Design, Automation and Test in Europe
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