Formal Equivalence Checking and Design DeBugging
Formal Equivalence Checking and Design DeBugging
Symbolic Model Checking without BDDs
TACAS '99 Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Testing, Verification, and Diagnosis in the Presence of Unknowns
VTS '00 Proceedings of the 18th IEEE VLSI Test Symposium
Post-verification debugging of hierarchical designs
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Abstraction and refinement techniques in automated design debugging
Proceedings of the conference on Design, automation and test in Europe
An analysis of SAT-based model checking techniques in an industrial environment
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
Fault diagnosis and logic debugging using Boolean satisfiability
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Automatic Fault Localization for Property Checking
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Automated design debugging with maximum satisfiability
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Managing complexity in design debugging with sequential abstraction and refinement
Proceedings of the 16th Asia and South Pacific Design Automation Conference
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Managing long verification error traces is one of the key challenges of automated debugging engines. Today, debuggers rely on the iterative logic array to model sequential behavior which drastically limits their application. This work presents Bounded Model Debugging, an iterative, systematic and practical methodology to allow debuggers to tackle larger problems than previously possible. Based on the empirical observation that errors are excited in temporal proximity of the observed failures, we present a framework that improves performance by up to two orders of magnitude and solve 2.7x more problems than a conventional debugger.