The Design of Rijndael
CRYPTO '99 Proceedings of the 19th Annual International Cryptology Conference on Advances in Cryptology
Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems
CRYPTO '96 Proceedings of the 16th Annual International Cryptology Conference on Advances in Cryptology
DES and Differential Power Analysis (The "Duplication" Method)
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
Differential Power Analysis in the Presence of Hardware Countermeasures
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
Multiplicative Masking and Power Analysis of AES
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
DPA Countermeasures by Improving the Window Method
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Instruction Stream Mutation for Non-Deterministic Processors
ASAP '02 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors
Power Analysis Attacks: Revealing the Secrets of Smart Cards (Advances in Information Security)
Power Analysis Attacks: Revealing the Secrets of Smart Cards (Advances in Information Security)
Information Theoretic Evaluation of Side-Channel Resistant Logic Styles
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
Attacking State-of-the-Art Software Countermeasures--A Case Study for AES
CHES '08 Proceeding sof the 10th international workshop on Cryptographic Hardware and Embedded Systems
Power and Fault Analysis Resistance in Hardware through Dynamic Reconfiguration
CHES '08 Proceeding sof the 10th international workshop on Cryptographic Hardware and Embedded Systems
A New DPA Countermeasure Based on Permutation Tables
SCN '08 Proceedings of the 6th international conference on Security and Cryptography for Networks
A Unified Framework for the Analysis of Side-Channel Key Recovery Attacks
EUROCRYPT '09 Proceedings of the 28th Annual International Conference on Advances in Cryptology: the Theory and Applications of Cryptographic Techniques
First-Order Side-Channel Attacks on the Permutation Tables Countermeasure
CHES '09 Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems
Analysis and improvement of the random delay countermeasure of CHES 2009
CHES'10 Proceedings of the 12th international conference on Cryptographic hardware and embedded systems
Lightweight cryptography and DPA countermeasures: a survey
FC'10 Proceedings of the 14th international conference on Financial cryptograpy and data security
Short-Circuits on FPGAs Caused by Partial Runtime Reconfiguration
FPL '10 Proceedings of the 2010 International Conference on Field Programmable Logic and Applications
A novel circuit design methodology to reduce side channel leakage
SPACE'12 Proceedings of the Second international conference on Security, Privacy, and Applied Cryptography Engineering
An EDA-friendly protection scheme against side-channel attacks
Proceedings of the Conference on Design, Automation and Test in Europe
A power side-channel-based digital to analog converterfor Xilinx FPGAs
Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
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In this work, we propose and evaluate generic hardware countermeasures against DPA attacks for recent FPGA devices. The proposed set of FPGA-specific countermeasures can be combined to resist a large variety of first-order DPA attacks, even with 100 million recorded power traces. This set includes generic and resource-efficient countermeasures for on-chip noise generation, random-data processing delays and S-box scrambling using dual-ported block memories. In particular, it is possible to build many of these countermeasures into a single IP-core or hard macro that then provides basic protection for any cryptographic implementation just by its inclusion in the design process - what is particularly useful for engineers with no or little background on security and side-channel attacks.