A note on binary template matching
Pattern Recognition
Testing semiconductor memories: theory and practice
Testing semiconductor memories: theory and practice
Theory of Transparent BIST for RAMs
IEEE Transactions on Computers
Pseudo-exhaustive word-oriented DRAM testing
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Deterministic tests for detecting scrambled pattern-sensitive faults in RAMs
MTDT '95 Proceedings of the 1995 IEEE International Workshop on Memory Technology, Design and Testing
Integration of Non-Classical Faults in Standard March Tests
MTDT '98 Proceedings of the 1998 IEEE International Workshop on Memory Technology, Design and Testing
Embedded Memory Test and Repair: Infrastructure IP for SOC Yield
ITC '02 Proceedings of the 2002 IEEE International Test Conference
Address Sequences for March Tests to Detect Pattern Sensitive Faults
DELTA '06 Proceedings of the Third IEEE International Workshop on Electronic Design, Test and Applications
Testing Active Neighborhood Pattern-Sensitive Faults of Ternary Content Addressable Memories
ETS '06 Proceedings of the Eleventh IEEE European Test Symposium
Detection oF Pattern-Sensitive Faults in Random-Access Memories
IEEE Transactions on Computers
Testing Memories for Single-Cell Pattern-Sensitive Faults
IEEE Transactions on Computers
DDECS '08 Proceedings of the 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems
Optimal Backgrounds Selection for Multi Run Memory Testing
DDECS '08 Proceedings of the 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems
Address Sequences and Backgrounds with Different Hamming Distances for Multiple Run March Tests
International Journal of Applied Mathematics and Computer Science - Selected Problems of Computer Science and Control
Transparent memory testing for pattern sensitive faults
ITC'94 Proceedings of the 1994 international conference on Test
Testing reconfigured RAM's and scrambled address RAM's for pattern sensitive faults
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Neighborhood pattern-sensitive fault testing and diagnostics for random-access memories
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Antirandom Test Vectors for BIST in Hardware/Software Systems
Fundamenta Informaticae
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March tests are widely used in the process of RAM testing. This family of tests is very efficient in the case of simple faults such as stuck-at or transition faults. In the case of a complex fault model-such as pattern sensitive faults-their efficiency is not sufficient. Therefore we have to use other techniques to increase fault coverage for complex faults. Multibackground memory testing is one of such techniques. In this case a selected March test is run many times. Each time it is run with new initial conditions. One of the conditions which we can change is the initial memory background. In this paper we compare the efficiency of multibackground tests based on four different algorithms of background generation.