Models and languages for parallel computation
ACM Computing Surveys (CSUR)
Proceedings of the 27th annual international symposium on Computer architecture
Memory arbiter synthesis and verification for a radar memory interface card
Nordic Journal of Computing
QEST '06 Proceedings of the 3rd international conference on the Quantitative Evaluation of Systems
The worst-case execution-time problem—overview of methods and survey of tools
ACM Transactions on Embedded Computing Systems (TECS)
A Framework for Distributing Real-Time Functions
FORMATS '08 Proceedings of the 6th international conference on Formal Modeling and Analysis of Timed Systems
A real-time architecture design language for multi-rate embedded control systems
Proceedings of the 2010 ACM Symposium on Applied Computing
Modeling shared cache and bus in multi-cores for timing analysis
Proceedings of the 13th International Workshop on Software & Compilers for Embedded Systems
Timing Analysis for TDMA Arbitration in Resource Sharing Systems
RTAS '10 Proceedings of the 2010 16th IEEE Real-Time and Embedded Technology and Applications Symposium
OTAWA: an open toolbox for adaptive WCET analysis
SEUS'10 Proceedings of the 8th IFIP WG 10.2 international conference on Software technologies for embedded and ubiquitous systems
A Predictable Execution Model for COTS-Based Embedded Systems
RTAS '11 Proceedings of the 2011 17th IEEE Real-Time and Embedded Technology and Applications Symposium
Quality of service capabilities for hard real-time applications on multi-core processors
Proceedings of the 21st International conference on Real-Time Networks and Systems
Proceedings of the 21st International conference on Real-Time Networks and Systems
Impact of resource sharing on performance and performance prediction: a survey
CONCUR'13 Proceedings of the 24th international conference on Concurrency Theory
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In order to be able to use multicore COTS hardware in critical systems, we put forward a time-oriented execution model and provide a general framework for programming and analysing a multicore compliant with the execution model.