Substrate crosstalk analysis in mixed signal CMOS integrated circuits: embedded tutorial
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Proceedings of the 38th annual Design Automation Conference
Comprehensive frequency-dependent substrate noise analysis using boundary element methods
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Analysis and optimization of substrate noise coupling in single-chip RF transceiver design
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Modeling of Substrate Noise Injected by Digital Libraries
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
Sensitivity-Based Modeling and Methodology for Full-Chip Substrate Noise Analysis
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Proceedings of the 41st annual Design Automation Conference
Substrate noise modeling in early floorplanning of MS-SOCs
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Methodology for efficient substrate noise analysis in large-scale mixed-signal circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
SWAN: high-level simulation methodology for digital substrate noise generation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Accurate and efficient simulation of synchronous digital switching noise in systems on a chip
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Techniques are presented to compactly represent substrate noise currents injected by digital networks. Using device-level simulation, every gate in a given library is modeled by means of the signal waveform it injects into the substrate, depending on its input transition scheme. For a given sequence of input vectors, the switching activity of every node in the Boolean network is computed. Assuming that technology mapping has been performed, each node corresponds to a gate in the library, hence, to a specific injection waveform. The noise contribution of each node is computed by convolving its switching activity with the associated injection waveforms. The total injected noise for the digital block is then obtained by summing all the noise contributions in the circuit. The resulting injected noise can be viewed as a random process, whose power spectrum is computed using standard signal processing techniques. A study was performed on a number of standard benchmark circuits to verify the validity of the assumptions and to measure the accuracy of the obtained power spectra