A circuit-compatible model of ballistic carbon nanotube field-effect transistors

  • Authors:
  • A. Raychowdhury;S. Mukhopadhyay;K. Roy

  • Affiliations:
  • Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA;-;-

  • Venue:
  • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • Year:
  • 2006

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Abstract

Carbon nanotube field-effect transistors (CNFETs) are being extensively studied as possible successors to CMOS. Novel device structures have been fabricated and device simulators have been developed to estimate their performance in a sub-10-nm transistor era. This paper presents a novel method of circuit-compatible modeling of single-walled semiconducting CNFETs in their ultimate performance limit. For the first time, both the I-V and the C-V characteristics of the device have been efficiently modeled for circuit simulations. The model so developed has been used to simulate arithmetic and logic blocks using HSPICE.