False loops through resource sharing
ICCAD '92 1992 IEEE/ACM international conference proceedings on Computer-aided design
Contemporary logic design
Exact required time analysis via false path detection
DAC '97 Proceedings of the 34th annual Design Automation Conference
Application of Ternary Algebra to the Study of Static Hazards
Journal of the ACM (JACM)
Digital Design: Principles and Practices
Digital Design: Principles and Practices
Making cyclic circuits acyclic
Proceedings of the 40th annual Design Automation Conference
The synthesis of cyclic combinational circuits
Proceedings of the 40th annual Design Automation Conference
Formal analysis of synchronous circuits
Formal analysis of synchronous circuits
Cyclic combinational circuits
On breakable cyclic definitions
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Scalable exploration of functional dependency by interpolation and incremental SAT solving
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
The analysis of cyclic circuits with Boolean satisfiability
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
An efficient cut enumeration for depth-optimum technology mapping for LUT-based FPGAs
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Reduction of interpolants for logic synthesis
Proceedings of the International Conference on Computer-Aided Design
An analysis of SAT-based model checking techniques in an industrial environment
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
Boolean Analysis of MOS Circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Test pattern generation using Boolean satisfiability
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Improvements to Technology Mapping for LUT-Based FPGAs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Transforming Cyclic Circuits Into Acyclic Equivalents
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Analysis of cyclic combinational circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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The accepted wisdom is that combinational circuits must have acyclic (i.e., feed-forward) topologies. Yet simple examples suggest that this is incorrect. In fact, introducing cycles (i.e., feedback) into combinational designs can lead to significant savings in area and in delay. Prior work described methodologies for synthesizing cyclic circuits with Sum-Of-Product (SOP) and Binary-Decision Diagram (BDD)-based formulations. Recently, techniques for analyzing and mapping cyclic circuits based on Boolean satisfiability (SAT) were proposed. This article presents a SAT-based methodology for synthesizing cyclic dependencies. The strategy is to generate cyclic functional dependencies through a technique called Craig interpolation. Given a choice of different functional dependencies, a branch-and-bound search is performed to pick the best one. Experiments on benchmark circuits demonstrate the effectiveness of the approach.