A Partial Scan Method for Sequential Circuits with Feedback
IEEE Transactions on Computers
DAC '93 Proceedings of the 30th international Design Automation Conference
A cost-based approach to partial scan
DAC '93 Proceedings of the 30th international Design Automation Conference
Implicit computation of minimum-cost feedback-vertex sets for partial scan and other applications
DAC '94 Proceedings of the 31st annual Design Automation Conference
An exact algorithm for selecting partial scan flip-flops
DAC '94 Proceedings of the 31st annual Design Automation Conference
Resynthesis and retiming for optimum partial scan
DAC '94 Proceedings of the 31st annual Design Automation Conference
Retiming with logic duplication transformation: theory and an application to partial scan
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Reduced Test Application Time Based on Reachability Analysis
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
| Hi-index | 0.00 |