Resynthesis and retiming for optimum partial scan

An exact algorithm for selecting partial scan flip-flops

DAC '94 Proceedings of the 31st annual Design Automation Conference

Partial scan with pre-selected scan signals

DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference

Partial scan selection for user-specified fault coverage

EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation

Retiming-Based Partial Scan

IEEE Transactions on Computers

Area efficient pipelined pseudo-exhaustive testing with retiming

DAC '96 Proceedings of the 33rd annual Design Automation Conference

Minimizing sensitivity to delay variations in high-performance synchronous circuits

DATE '99 Proceedings of the conference on Design, automation and test in Europe

Maximizing performance by retiming and clock skew scheduling

Proceedings of the 36th annual ACM/IEEE Design Automation Conference

Partial Scan with Preselected Scan Signals

IEEE Transactions on Computers

Partial BIST insertion to eliminate data correlation

ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design

Retiming with logic duplication transformation: theory and an application to partial scan

VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication

Partial Scan Design Based on Circuit State Information and Functional Analysis

IEEE Transactions on Computers

Reduced Test Application Time Based on Reachability Analysis

ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design

Eliminating the Timing Penalty of Scan

Journal of Electronic Testing: Theory and Applications

Relax-and-retime: a methodology for energy-efficient recovery based design

Proceedings of the 50th Annual Design Automation Conference