Power minimization in IC design: principles and applications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Glitch analysis and reduction in register transfer level power optimization
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Inaccuracies in power estimation during logic synthesis
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
New approach in gate-level glitch modelling
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Effects of correlations on accuracy of power analysis—an experimental study
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Short circuit power consumption of glitches
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Synthesis of low-power asynchronous circuits in a specified environment
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Power analysis of a 32-bit RISC microcontroller integrated with a 16-bit DSP
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Power-simulation of cell based ASICs: accuracy-and performance trade-offs
Proceedings of the conference on Design, automation and test in Europe
G-vector: A New Model for Glitch Analysis in Logic Circuits
Journal of VLSI Signal Processing Systems
Domain Specific Reconfigurable Processing Core Architecture for Digital Filtering Applications
Journal of VLSI Signal Processing Systems
Flip-flop insertion with shifted-phase clocks for FPGA power reduction
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Worst case power/ground noise estimation using an equivalent transition time for resonance
IEEE Transactions on Circuits and Systems Part I: Regular Papers - Special issue on ISCAS2008
Architectural optimization for low-power nonpipelined asynchronous systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Data bus swizzling in TSV-based three-dimensional integrated circuits
Microelectronics Journal
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